Module Systemc

module Systemc: sig .. end
SystemC model generation.

val output_model : Circuit.circuit -> unit
Writes a C model (<circuit>.h, <circuit>.c ) and a SystemC wrapper (<circuit>_sc.h).


There could be a situation where the (System)C-code produces wrong results. This could occur when there is combinational logic between registers and outputs (you'll get a INFO when using outputs this way). In this case the results of these outputs could be delayed one cycle. You can avoid this potential problem by avoiding combinational logic between registers and outputs.

The presence of this potential bug has neither be confirmed nor disproved yet. The problem should be addressed in the releases to come.

Usage of the generated C-Model

Types and Functions

Types (see generated .h-file):


Assuming the names my_design.c and my_design.h for the generated C files a testbench could look like this:

#include <stdio.h>
#include <assert.h>

#include "my_design.h"

int main()
  int i;
  simulator_t sim;
  signal_t i8;       // input
  signal_t o4;       // output

  sim = new_simulator();

  i8=find_simulator_port(sim, "i8"); assert(i8.signal);
  o4=find_simulator_port(sim, "o4"); assert(o4.signal);

  for (i = 0; i < 5; i++)
    printf("cycle %2d: o4=%ld \n", i, o4.signal[0] );

  return 0;

This example uses the function find_simulator_port. You can of course still access the struct members in sim->signals.my_design directly, like in previous versions.